Typical implementations of nowadays large vocabulary continuous speech recognizers fail to meet real time considerations. Therefore we present a twofold approach to reach real time operation of the search task for a 10 000 word continuous speech recognizer. At first, we develop search algorithms, which reduce the computations needed and are suitable for hardware implementation. Secondly, a single-chip VLSI coprocessor is introduced, which implements the algorithms developed. The coprocessor is designed in a 1.0 pm standard cell technology, covers an area of approximately 87 mm² and has a pincount of 284.

Keywords: continuous speech recognition, real time operation, large vocabularies, search algorithms, hardware architecture.